Overview

The maintenance layer that lets digital control and analog computation compose.

TrueLoop is the stability layer for a hybrid architecture. A digital host directs the computation, while a photonic, wave, quantum, or in-memory analog coprocessor carries dense physical transforms in resident state. TrueLoop keeps that analog state true without returning a growing calibration burden to the digital host.

Each cycle applies the current configuration, reads every exposed component response in parallel, and returns the next complete configuration. The controller performs O(n) digital work and carries bounded memory per channel, while the coprocessor can retain an n²-scale transform behind n-vector input and output interfaces.

The same contract covers regulation and compatible optimization. When the objective is the squared norm of an exposed vector response error, minimizing that objective is equivalent to regulating the measured response to its target.

The value is concentrated where acquisitions are expensive, hardware drifts, channel count is high, and the deadline is fixed. Fit requires component-resolved response, feasible non-extremal targets, timely parallel readout, bounded drift and coupling, and operation inside the declared envelope.

opt = SWCOptimizer(key, n=len(x0), mode="regulation", target=target)
x = opt.start(x0)
for _ in range(rounds):
    x = opt.step(measure(x), target=target)
opt.end()